EE5324: VLSI Design II

3 Credits

CMOS arithmetic logic units, high-speed carry chains, fast CMOS multipliers. High-speed performance parallel shifters. CMOS memory cells, array structures, read/write circuits. Design for testability, including scan design and built-in self test. VLSI case studies. prereq: [5323, CSE grad student] or dept consent

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A- Average (3.629)Most Common: A (40%)

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181 students
SWFDCBA
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    /6

    Recommend
  • 4.62

    /6

    Effort
  • 5.39

    /6

    Understanding
  • 5.32

    /6

    Interesting
  • 5.40

    /6

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